1. Field of the Invention
The present invention is in the field of data storage devices including disk drives and mass storage systems and pertains particularly to processor-based data storage devices and systems for managing host access to and data management on those devices.
2. Discussion of the State of the Art
In the field of data storage, non-volatile mechanical disk drives have been developed for short and long-term data storage. Solid-state non-volatile memory has been implemented for specific data storage needs, especially in small, portable electronic computing devices such as cellular telephones, video cameras and the like.
Volatile memory is a solid-state memory typically used as a high-speed temporary memory such as random access memory (RAM) of which there are many known variations. Common versions of RAM include Dynamic Random Access Memory (DRAM) and Static Random Access Memory (SRAM) among other variations such as SDRAM.
Flash memory, on the other hand, is a solid-state, high-speed data storage solution that has, until recently, been used mainly for handheld devices like cell phones, personal digital assistants (PDAs), cameras, or Universal Serial Bus (USB) peripheral storage devices referred to as jump drives or thumb drives. Flash memory provides a non-volatile memory for storing data with read speeds approaching that of RAM. Common memory types that require management include Phase Change Memory and NAND Flash.
When referring to these memory types, the terms volatile and non-volatile are blurring as new research in memory continues and new memory types are developed. But for purpose of this specification, volatile memory shall refer to memory in which stored data is lost upon interruption of power and non-volatile memory shall refer to memory in which no power is required to retain the data stored. Flash memory is increasingly being used as primary or secondary storage memory in computing systems. Such devices are commonly known as solid-state disks. Flash is also being used as cache memory in some systems.
A solid-state disk drive known to the inventor, but not as publicly available prior art, includes a first portion of solid-state memory of a volatile nature, a second portion of solid-state memory of a non-volatile nature, a controller for managing the memories, and a power subsystem for protecting data in volatile memory in the event of loss of power. The drive is, in one embodiment, a hot swappable disk drive that is recognized by a host system upon boot as a destination drive for reads and writes.
A controller is provided on the disk drive for managing the memory portions as a single non-volatile memory through use of at least one integrated circuit supporting one or more sets of machine-readable instructions and a data port and buffer circuitry for bi-directional communication of data between the controller and a host system such as a computer.
The system known to the inventor uses a RAM/Flash data storage addressing method that prevents continued and repetitive writing to Flash to preserve mean time before failure (MTBF) of the Flash storage device or devices of the system. The system uses RAM as a caching memory and only writes to Flash when absolutely necessary. Another optimization of the system is rotation of Flash blocks in and out of service to further enhance wear leveling of the Flash device or aggregate of devices onboard or plugged into the disk drive.
Writing to Flash memory is comparatively slower than writing to RAM, hence the use of RAM in the above-described system to cache data for eventual write to Flash on power down, power interruption, or only when the RAM cache is full. The system described above provides a practical and economical solution for replacing mechanical hard disk drives in computers and other devices.
It has occurred to the inventor that there is a need for faster data management speeds in the computing industry in general and in particular in the area of robust servers and other business machines. While CPU speeds are at all time highs in terms of computing cycles, speeds at which data can be managed relative to disk storage on a Flash memory are still relatively slower. This has caused a barrier to extensive use of Flash memory in more robust data storage systems.
Still another disadvantage of using Flash memory as long-term storage in robust systems is that a number of writes performed on the memory is limited on a Flash memory chip and the media must be written in a manner, often proprietary, as specified by the manufacturer of the Flash memory. Such adaptations may not be readily supported by a particular host system sending the data for storage. This fact has been a basis for differing approaches to Flash memory management software and firmware that deal essentially with how data may be rendered and stored on the particular type Flash memory implemented.
Further to the above, current Flash data storage systems rely on a single central processing unit (CPU) to manage Flash tables and perform other data management tasks. A drawback is that such applications place significant performance demands on Flash-based storage and caching systems, preventing scaling of those systems to meet enterprise standards for mass data storage systems.
RAM and specific data bus contentions or issues effectively prohibit single processor Flash management schemes from scaling to a high-performance level. For example, there are many operations performed by and in conjunction with a microprocessor that compete with each other on a storage device for RAM space. Error Code Correction (ECC) and real-time data encryption are just a few of these operations that compete with address lookups, read and write requests and other important data access functions.
Current Flash memory research is resulting in faster Flash memory types that may be operated much faster than current Flash types. But RAM access and data bus contentions present problems in current architectures that cause latency and prevent full potential for faster computing. Therefore, what is needed in the art is a Flash-based storage device and data management system that can be scaled up for high-performance write and read operations without bogging down due to RAM and Bus issues.